X-Git-Url: https://git.dogcows.com/gitweb?p=chaz%2Fyoink;a=blobdiff_plain;f=build%2Fcompile.sh;fp=build%2Fcompile.sh;h=0000000000000000000000000000000000000000;hp=75aec0ab4c944ab8212b4c40c73d36334392c006;hb=bd62b2e6a6e5f1af5a635df3ff1a07f363d9ffe0;hpb=7ac3aee9efa7f9ce1a966df030b1f76f2b82ef2d

diff --git a/build/compile.sh b/build/compile.sh
deleted file mode 100755
index 75aec0a..0000000
--- a/build/compile.sh
+++ /dev/null
@@ -1,130 +0,0 @@
-#!/bin/sh
-#
-# CCDEPS-GCC (C) 2002 Emile van Bergen. Distribution of this file is allowed
-# under the conditions detailed in the GNU General Public License (GPL). See 
-# the file COPYING for more information.
-#
-# This script compiles and/or links one or more source or object files into a
-# object file or executable target, and outputs all extra dependencies found
-# while doing so in a file named target.d, which can be used by GNU Make.
-#
-# The script should be invoked the same way as your C compiler, that is,
-# specifying the target using a -o option and the source or object files as 
-# non-option arguments. It will generate dependencies in the form
-#
-# target target.d: dir/file1.c dir/file2.c header1.h header2.h
-# dir/file1.c dir/file2.c header1.h header2.h:
-#
-# This version is intended for GCC, which can do compilation and dependency
-# generation in one step. The name of the GCC version (default gcc) can be
-# overridden using the CC environment variable.
-#
-# CHANGELOG
-#
-# 2003/1/8: EvB: adapted for gcc 3.2, still handles 2.95 as well.
-#
-#   This was necessary because gcc 3.2 handles -MD differently than gcc 2.95:
-#   where the old version generated a .d file for each source, in the current
-#   directory, the new one does almost completely what this script intended to
-#   do: generate one .d file in the same directory and with the same file name
-#   as the target.
-#
-#   The only fixups 3.2's .d files still need are:
-#
-#   - changing the file name; gcc 3.2 strips the suffix of the target before 
-#     appending the .d, so targets x and x.o will both produce x.d, which is
-#     not what we want;
-#
-#   - adding the implicit dependencies as prerequisiteless targets, so that
-#     make will just consider the target out of date if one does not exist
-#     anymore; 
-#
-#   - adding the .d file as depending on the same prerequisites as our real
-#     target so that it will be considered out of date if one of the files
-#     mentioned in it are updated or missing.
-#
-#   Basically, this version does all that by simply including the file
-#   <strippedtarget>.d file in the list of .d files we look for. We may end
-#   up generating the same file name, but that already was handled correctly.
-#   Otherwise we perform the normal routine, so that we /know/ the targets will
-#   be correct, directories and all, regardless of variations in gcc behaviour.
-
-test -x "functions.sh" && . "functions.sh"
-test -x "build/functions.sh" && . "build/functions.sh"
-
-export CC=$1
-shift
-
-
-cmdline=""
-# After having passed the arguments, they have already been parsed once by
-# the shell, so they needed to be re-quoted.
-for arg in "$@"
-do
-	arg="$(quote_string "$arg")"
-	cmdline="$cmdline $arg"
-done
-
-
-while [ x"$1" != x ]
-do
-	case "$1" in
-		-o) tgt="$2" ; shift ;;	# target specifier option
-		-x|-u|-b|-V) shift ;;	# options with arg after space
-		-*) ;;			# standard options
-		*) fil="$fil $1" ;;	# source or object files
-	esac
-	shift
-done
-
-#if [ x"$CC" = x ]
-#then
-	#CC=gcc
-	#export CC
-#fi
-
-# If we're not processing any .c files (link only), run gcc as-is and we're done
-
-expr "$fil" : ".*\.c" >/dev/null || exec $CC $cmdline
-
-# Otherwise, run the gcc with the -MD option, which generates a .d file
-# in the current directory for each .c or .cc source file processed.
-#
-# These files are post-processed (replacing the incorrectly named target
-# with the real target specified with -o, and adding the .d file), concatenated
-# into one .d file that is named based on the target name, and put in the
-# correct directory. Further, all prerequisites are added as bare targets,
-# preventing errors when files are missing due to renaming or restructuring
-# headers, but causing the files dependent on them to be considered out of
-# date. (GNU Make feature).
-#
-# Makefiles must include the .d files like this: -include $(OBJS_$(d):.o=.d)
-# or, when compiling and linking in one step: -include $(TGTS_$(d):%=%.d)
-
-dep=$tgt.d
-rm -f $dep
-
-#echo $CC -MD $cmdline
-eval "$CC -MD $cmdline"
-res=$?
-
-dgcc3=`echo $tgt | sed -e 's/\.[^.]*$//'`.d
-dgcc=`echo $fil | sed -e 's/[^ 	]*\.[^c]//' -e 's/\.cpp/\.d/g' -e 's/\.cc/\.d/g' -e 's/\.c/\.d/g' -e 's%.*/%%g'`
-
-for tf in $dgcc3 $dgcc
-do
-	if [ -f $tf ] && mv $tf $dep.tmp
-	then
-		sed -e "s%.*:%$tgt $dep:%" < $dep.tmp >> $dep
-		sed -e 's%^.*:%%' -e 's%^ *%%' -e 's% *\\$%%' -e 's%$%:%' \
-			< $dep.tmp >> $dep
-		rm -f $dep.tmp
-		found=1
-	fi
-done
-
-[ x"$found" = x"1" ] && exit $res
-
-echo ERROR: $0: Cannot find any compiler-generated dependency files\!
-exit 1
-